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January 19, 2009 - Updated
January 19, 2009 - Originally Posted
DI Resistivity for Wafer Dicing and Cleaning
What should DI water resistivity be for wafer dicing and cleaning? What might be the effect of lower DI resistivity on the performance of the wafer?
N.P.
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| Expert Panel Responses |
I did some research found out that "For front end applications like this usually companies are working with a conductivity level of maximum 1 uS (minimum of 1 MegOhm). The rinsing performance itself will be not significantly influenced by a higher conductivity or lower resistivity but the ions might cause some reliability and functionality issues on the chip."
Umut Tosun
Application Technology Manager, Zestron America
Mr. Tosun has published numerous technical articles. As an active member of the SMTA and IPC organizations, Mr. Tosun has presented a variety of papers and studies on topics such as "Lead-Free Cleaning" and "Climatic Reliability".
- We have been effective at using 14-18 meg ohm resistivity DI water for our clients dicing wafers.
- The lower the resistivity the more contamination can be deposited on the wave and bond pads. The lower the resistivity the greater the amount of soluble silica coming from the local municipality which can coat the bond pads and make the surface harder to bond to.
Terry Munson
President/Senior Technical Consultant, Foresite
Mr. Munson, President and Founder of Foresite, has extensive electronics industry experience applying Ion Chromatography analytical techniques to a wide spectrum of manufacturing applications.
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