How To Reduce Solder Joint Voids in QFN Components

What techniques and methods can we use regarding our solder paste stencil design to reduce or eliminate solder joint voids in QFN components?

H.C.

Expert Panel Responses

You can reduce the stencil aperture by 50% to 80% of the thermal pad area and also by segmenting it similar to a window pattern.

Edithel Marietti
Senior Manufacturing Engineer
Northrop Grumman

Edithel is a chemical engineer with 20 year experience in manufacturing & process development for electronic contract manufacturers in US as well as some major OEM's. Involved in SMT, Reflow, Wave and other assembly operations entailing conformal coating and robotics.

During QFN rework, stencil design is critical to reducing solder joint voiding. We have had great success with a stencil aperture design where the paste is printed directly onto the component, but in multiple small quadrants. The idea is to break the central ground pad into several "window panes" that will leave channels for flux volatiles to escape.

In addition, we have found that a rework profile that incorporates a longer soak time combined with higher reflow temperatures (lead-free solder joints reach a peak temperature of 250 degrees C) can help reduce solder voiding in QFN packages.

Aaron Caplan
Director of Marketing & Training
PACE Worldwide

Mr. Caplan has been involved in electronics manufacturing technology since the 80's, is an acknowledged expert in Miniature/Microminiature Electronics Repair, and provides technical expertise in teaching of non-destructive PCB rework/repair techniques, educating industry on how to properly utilize these techniques.

There are whole papers on the topic.

At a minimum, usually some sort of window pane is used for the large central pad. This creates channels in the paste deposit whereby solder paste flux vapors can escape. Some techniques use a more sophisticated aperture design such as "Pac Man" shaped deposits of paste. The "mouth" of "Pac Man" creates an additional outgassing channel.

Something else to consider, although, perhaps, counterintuitive is increasing the thickness of the stencil (e.g. going from .004" to .005"). A thicker stencil means a thicker paste deposit. And a thicker paste deposit increases the distance between the bottom of the component and the top of the board. A larger gap or standoff facilitates the escape of the flux vapors.

Kay Parker
Technical Support Engineer
Indium Corporation

Kay Parker is a Technical Support Engineer based at Indium Corporation's headquarters in Clinton, N.Y. In this role she provides guidance and recommendations to customers related to process steps, equipment, techniques, and materials. She is also responsible for servicing the company's existing accounts and retaining new business.

Window-paning is the accepted method of optimizing the solder paste deposition for the large pad under QFN components. The optimal pattern and percent coverage depends on the specific part and the design of the PWB that it is mounted on, including the number and placement of any thermal vias, and the surface metallization.

Voiding is also highly dependent on the specific solder paste used and the reflow profile, and finally on whether the part experiences one (mounted second side) or two (mounted first side) reflows. Given this large number of variables, it's hard to give specific advice on design. What affects voiding will also affect the part mounting height and ultimately the reliability of the interconnection. In general, try to provide four to eight individual paste deposits with lanes between them where gasses can escape.

Also review the voiding performance of your solder paste, and if you find you have a higher-voiding paste and can't change it, optimize the reflow profile; talk with the technical folks at the paste manufacturer to determine how to best optimize for lower voiding with a particular paste.

Fritz Byle
Process Engineer
Astronautics

Fritz's career in electronics manufacturing has included diverse engineering roles including PWB fabrication, thick film print & fire, SMT and wave/selective solder process engineering, and electronics materials development and marketing. Fritz's educational background is in mechanical engineering with an emphasis on materials science. Design of Experiments (DoE) techniques have been an area of independent study. Fritz has published over a dozen papers at various industry conferences.

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