Via Wall Thickness Test

Is there a non-destructive method for testing and screening bare PCBs for breakage or thin plating on the walls of vias?

B.O.

Expert Panel Responses

There are a number of copper plating thickness"meters" where by you insert a probe into a plated through hole and a thickness reading is achieved. They are not the most accurate items but are great for measuring gross plating defects which it looks like you may have.

Gerard O'Brien
President
S T and S Testing and Analysis

Gerald O'Brien is Chairman of ANSI J-STD 003, and Co Chairman of IPC 4-14 Surface Finish Plating Committee. He is a key member of ANSI J-STD 002 and 311 G Committees Expert in Surface finish, Solderability issues and Failure analysis in the PWA, PWB and component fields.

Yes, there is. The method commonly in use by PWB fabricators is the micro-resistance method. In commercially available equipment (e.g. UPA Caviderm), a probe is brought into contact with the upper and lower edge of the plated hole, and the resistance of the plating in the hole is measured.

From the electrical resistance, the average thickness of the copper in the hole maybe measured. If the barrel has cracked, the reported thickness will, of course,be artificially low, or even unmeasureable. The micro-resistance technique is applicable through-vias on bare boards.

When a cracked via is suspected on an assembly, the best method is to attach test leads to measure the via resistance and subject the board to moderate thermal cycles, monitoring the resistance. The via may have continuity at room temperature or at cold, but fail at hot.

Transmission x-ray can also be used in conjunction with resistance techniques. If the resistance of a specific via is very high, x-ray can validate whether or not plating voids are to blame. In addition, a relatively good measurement of copper thickness can be made with a capable x-ray system.

Cracks in barrels cannot be reliably detected with x-ray, however a barrel that tests "open" but shows sufficient copper thickness and no voids is almost certainly cracked. Transmission x-ray is applicable to both through and blind/buried vias on both raw PWBs and assembled boards.

Fritz Byle
Process Engineer
Astronautics

Fritz's career in electronics manufacturing has included diverse engineering roles including PWB fabrication, thick film print & fire, SMT and wave/selective solder process engineering, and electronics materials development and marketing. Fritz's educational background is in mechanical engineering with an emphasis on materials science. Design of Experiments (DoE) techniques have been an area of independent study. Fritz has published over a dozen papers at various industry conferences.

One way you could find thin plating is to measure resistance in a flying probe type of application. You could set up the test using a golden board, measure the resistance for each net and find the variations in resistance.

The problem includes the resistance measurement must be sensitive enough to find the discrepancies; most boards have thin line widths and would mask thin plating in the interconnection (PTH, blind or buried via). Another problem is length of time it takes to measure each net in a board would be long.

A better way is to measure the resistance in coupons that have a known resistance in hundreds of interconnections. One such coupon is an Interconnect Stress Test (IST) coupon. You could fabricate IST coupons on the edge of the production panel so the copper quality in the coupon is the same asin the board. You could then measure the resistance (in milliohms) in the sense circuit which usually contains hundreds of interconnections, using a four wire ohm meter.

The IST coupon is designed to be sensitive to the volume of copper in the interconnection rather than the traces between the interconnections.Measuring the resistance of the sense circuit would allow you to identify the coupons with the highest resistance which means the least amount of copper. Then you can micro section the coupon and measure the copper thickness. After a few times you can equate the resistance to a given copper thickness.

You would then be able to find the production panels with the thinnest plating electronically.You could then establish a "go" "no go" resistance measurement. If the boards violate the resistance measurement then you can sort out the corresponding boards for thin plating.

Paul Reid
Program Coordinator
PWB Interconnect Solutions

Paul Reid has over 35 years experience in bare board fabrication, quality and reliability. Working for PWB Interconnect Solutions, which does thermal cycle evaluations (IST) of representative coupons, Paul provides failure and root cause analysis of how PWBs fail. His area of expertise includes how circuit board's copper interconnections and material fails in assembly, rework and in the field, as a result of thermal cycling.

The best method is used for several of my client companies for continual monitoring of via walls and copper traces at little or no cost. Simply have a small circuit, perhaps two SMT chip resistor pads with interconnecting traces and two or three vias, all on one of the two carrier strips on each PWB, on each side of the strip. These are representative of the copper that is on the PWB itself.

The carrier strip can be removed and micro-sectioned in-house and will give you a true visual image of the copper thickness not only of the via walls, traces, foil, etc., but also the solderability as well. These representative circuits cost nothing to fabricate (they are made as part of the overall PWB), cost very little to design in, and essentially provide you with a free representative sample coupon with every PWB. You can choose to have them populated or not populated when you build the production boards.

Richard D. Stadem
Advanced Engineer/Scientist
General Dynamics

Richard D. Stadem is an advanced engineer/scientist for General Dynamics and is also a consulting engineer for other companies. He has 38 years of engineering experience having worked for Honeywell, ADC, Pemstar (now Benchmark), Analog Technologies, and General Dynamics.

Submit A Comment

Comments are reviewed prior to posting. You must include your full name to have your comments posted. We will not post your email address.

Free Newsletter Subscription
Circuitnet is built for professionals who bear the responsibility of looking ahead, imagining the future, and preparing for it.

Insert Your Email Address