J Lead Overhang Specification

The tip of a J lead component extends beyond the pad. The tip extends slightly over a conductor below, but the conductor is covered with solder mask.

Is this acceptable? If not, can you refer me to a reference specification?

D. G.

Expert Panel Responses

Per IPC-A-610 Rev E, page 10-44, " Although not rated for dielectric strength, and therefore not satisfying the definition of an "insulator or insulating material," some solder mask formulations provide limited insulation and are commonly used as surface insulation where high voltages are not a consideration." Hence, solder should not be used as an insulator. If the lead extends over the conductor as shown in the picture, one has to define the minimum electrical spacing and this spacing will apply to the distance between the pin and the conductor trace beneath the solder mask. If the solder mask is to be used as an insulator then the electrical and dielectric parameters have to be specified on the master drawing.

Leo Lambert
Vice President, Technical Director
EPTAC Corporation

At EPTAC Corporation, Mr. Lambert oversees content of course offerings, IPC Certification programs and provides customers with expert consultation in electronics manufacturing, including RoHS/WEEE and lead free issues. Leo is also the IPC General Chairman for the Assembly/Joining Process Committee.

This user needs to refer to IPC-2221 section 6.3 "electrical clearance".

Edward Zamborsky
Regional Sales Manager
OK International Inc.

Ed Zamborsky is a Regional Sales & Technical Support Manager for Thermaltronics, located in New York. His position requires frequent customer visits throughout North America and the Caribbean and his position encompasses not only sales but the role of trainer and master applications engineer for all of Thermaltronics products. His expertise includes such specialties as hand soldering, convection and conduction reflow techniques, array rework, fluid dispensing equipment, and fume extraction. Ed has authored many articles and has presented many papers on topics such as; Low Volume SMT Assembly, Solder Fume Extraction, SMT Rework, BGA Rework, Lead-Free Hand Soldering, High Thermal Demand Hand Soldering, Lead Free Visual Inspection and Lead Free Array Rework.

According to J-STD-001D Table 7.7. the toe overhang must not violate minimum electrical clearance. In this case I would estimate the designed clearance has been reduced and this would thereforebe unacceptable. Also, solder resist can not be relied on to provide electrical insulation since it tends to be thinner along track edges etc and breakdown can therefore occur.

Bryan Kerr
Principal Engineer - CMA Lab
BAE Systems

Bryan Kerr has 35 years experience in providing technical support to PEC assembly manufacturing. His experience ranges from analysis of materials and components to troubleshooting and optimizing, selecting reflow, cleaning, coating and other associated processes.

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